ADG852 - Analog Devices
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ADG852 - Analog Devices
0.8 Ω CMOS, 1.8 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP ADG852 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM 0.8 Ω typical on resistance Less than 1 Ω maximum on resistance at 85°C 1.8 V to 5.5 V single supply High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast-switching times: <17 ns Typical power consumption: <0.1 µW 1.30 mm × 1.60 mm, 10-lead mini LFCSP ADG852 S1 D S2 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. APPLICATIONS 07461-001 IN Figure 1. Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG852 is a low voltage CMOS single-pole, double-throw (SPDT) switch. This device offers ultralow on resistance of less than 1 Ω over the full temperature range. The ADG852 is fully specified for 5.5 V and 3.3 V supply operation. 1. <1 Ω over full temperature range of −40°C to +85°C. 2. Single 1.8 V to 5.5 V operation. 3. Compatible with 1.8 V CMOS logic. 4. High current handling capability (300 mA continuous current per channel). 5. Low THD + N: 0.08% typical. 6. 1.30 mm × 1.60 mm, 10-lead mini LFCSP. Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. The ADG852 exhibits break-before-make switching action. The ADG852 is available in a 1.30 mm × 1.60 mm 10-lead mini LFCSP. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved. ADG852* Product Page Quick Links Last Content Update: 08/30/2016 Comparable Parts Design Resources View a parametric search of comparable parts • • • • Documentation Data Sheet • ADG852: 0.8 Ω CMOS, 1.8 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP Datasheet Reference Materials Product Selection Guide • Switches and Multiplexers Product Selection Guide ADG852 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints Discussions View all ADG852 EngineerZone Discussions Sample and Buy Visit the product page to see pricing options Technical Support Submit a technical question or find your regional support number * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. 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ADG852 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................5 Applications ....................................................................................... 1 Pin Configuration and Function Description ...............................6 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ..............................................7 General Description ......................................................................... 1 Test Circuits..................................................................................... 10 Product Highlights ........................................................................... 1 Terminology .................................................................................... 12 Revision History ............................................................................... 2 Outline Dimensions ....................................................................... 13 Specifications..................................................................................... 3 Ordering Guide .......................................................................... 13 Absolute Maximum Ratings ............................................................ 5 REVISION HISTORY 5/12—Rev. A to Rev. B Changes to Ordering Guide .......................................................... 13 10/08—Rev. 0 to Rev. A Change to Title .................................................................................. 1 Changes to Features Section............................................................ 1 Changes to Product Highlights Section......................................... 1 8/08—Revision 0: Initial Version Rev. B | Page 2 of 16 Data Sheet ADG852 SPECIFICATIONS VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, ∆RON +25°C 0.8 0.85 0.02 −40°C to +85°C Unit 0 V to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max 1 0.04 On Resistance Flatness, RFLAT (ON) 0.17 0.23 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM ±10 ±30 pA typ pA typ VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA VDD = 5.5 V VS = 0.6 V/4.2 V, VD = 4.2 V/0.6 V; see Figure 17 VS = VD = 0.6 V or 4.2 V; see Figure 18 µA typ µA max pF typ VIN = VGND or VDD 0.05 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ RL = 50 Ω, CL = 35 pF VS = 3 V/0 V; see Figure 19 RL = 50 Ω, CL = 35 pF VS = 3 V; see Figure 19 RL = 50 Ω, CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 20 VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24 RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p RL = 50 Ω, CL = 5 pF; see Figure 23 RL = 50 Ω, CL = 5 pF; see Figure 23 2.5 28 9.2 30 −75 −73 0.08 −0.6 100 19.5 50 0.002 1.0 1 VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA V min V max 8 Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N Insertion Loss −3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16 2.0 0.8 0.002 17 23 6 8.5 14 Test Conditions/Comments µA typ µA max Guaranteed by design, not subject to production test. Rev. B | Page 3 of 16 VDD = 5.5 V Digital inputs = 0 V or 5.5 V ADG852 Data Sheet VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, ∆RON +25°C 1.3 1.5 0.03 −40°C to +85°C Unit 0 V to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max 1.7 0.05 On Resistance Flatness, RFLAT (ON) 0.48 0.66 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM ±10 ±30 pA typ pA typ VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 17 VS = VD = 0.6 V or 3.3 V; see Figure 18 µA typ µA max pF typ VIN = VGND or VDD 0.05 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ RL = 50 Ω, CL = 35 pF VS = 1.5 V/0 V; see Figure 19 RL = 50 Ω, CL = 35 pF VS = 1.5 V; see Figure 19 RL = 50 Ω, CL = 35 pF VS1 = VS2 = 1 V; see Figure 20 VS = 1.5 V, RS = 0 V, CL = 1 nF; see Figure 21 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24 RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p RL = 50 Ω, CL = 5 pF; see Figure 23 RL = 50 Ω, CL = 5 pF; see Figure 23 4 43 8 23 −75 −73 0.15 −0.07 100 20 52 0.002 1.0 1 VDD = 2.7 V, VS = 0.6 V, IDS = 100 mA V min V max 13 Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD Insertion Loss –3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD = 2.7 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16 1.35 0.7 0.002 25 37 7 7.4 22 Test Conditions/Comments µA typ µA max Guaranteed by design, not subject to production test. Rev. B | Page 4 of 16 VDD = 3.6 V Digital inputs = 0 V or 3.6 V Data Sheet ADG852 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VDD to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Pins Continuous Current, S or D Pins Operating Temperature Range Storage Temperature Range Junction Temperature Mini LFCSP θJA Thermal Impedance, 3-Layer Board Reflow Soldering, Pb-Free Peak Temperature Time at Peak Temperature 1 Rating −0.3 V to +6 V −0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V or 10 mA, whichever occurs first 500 mA (pulsed at 1 ms, 10% duty cycle max) 300 mA −40°C to +85°C −65°C to +150°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time. ESD CAUTION 131.6°C/W 260(+0/−5)°C 10 sec to 40 sec Overvoltages at the IN, S, or D pins are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. B | Page 5 of 16 ADG852 Data Sheet 9 NC 1 S1 ADG852 8 NC NC = NO CONNECT 07461-002 VDD 6 IN 4 7 NC TOP VIEW (Not to scale) VDD 5 D 2 S2 3 10 GND PIN CONFIGURATION AND FUNCTION DESCRIPTION Figure 2. Pin Configurations Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5, 6 7, 8, 9 10 Mnemonic S1 D S2 IN VDD N/C GND Description Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. Logic Control Input. Most Positive Power Supply Potential. No Connect. Ground (0 V) Reference. Table 5. ADG852 Truth Table Logic 0 1 Switch 1 Off On Switch 2 On Off Rev. B | Page 6 of 16 Data Sheet ADG852 TYPICAL PERFORMANCE CHARACTERISTICS 0.9 1.2 VDD = 3.3V TA = 25°C 0.8 TA = +85°C 1.0 ON RESISTANCE (Ω) ON RESISTANCE (Ω) 0.7 0.6 0.5 0.4 VDD VDD VDD VDD 0.3 0.2 = 4.2V = 4.5V = 5.0V = 5.5V TA = +25°C 0.8 TA = –40°C 0.6 0.4 0.2 0 1 3 2 4 5 6 VD, VS (V) 0 07461-003 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VD, VS (V) Figure 3. On Resistance vs. VD (VS), VDD = 4.2 V to 5.5 V 07461-006 0.1 Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V 1.1 1.6 VDD = 5V TA = 25°C 1.4 0.9 LEAKAGE (nA) ON RESISTANCE (Ω) 1.2 1.0 0.8 0.6 VDD VDD VDD VDD 0.4 = 2.7V = 3.0V = 3.3V = 3.6V ID, ID, ID, ID, 0.7 0.5 IS (ON) ++ IS (OFF) +– IS (ON) – – IS (OFF) –+ 0.3 0.1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 –0.1 10 07461-004 0 4.0 VD, VS (V) 20 30 40 50 60 70 80 TEMPERATURE (°C) Figure 4. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V 07461-007 0.2 Figure 7. Leakage Current vs. Temperature, VDD = 5 V 0.9 0.8 VDD = 5V VDD = 3.3V 0.7 TA = +85°C 0.6 TA = +25°C 0.6 LEAKAGE (nA) ON RESISTANCE (Ω) 0.8 0.5 TA = –40°C 0.4 ID, ID, ID, ID, 0.4 IS (ON) ++ IS (OFF) +– IS (ON) – – IS (OFF) –+ 0.2 0.3 0.2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VD, VS (V) 3.5 4.0 4.5 5.0 –0.2 07461-005 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) Figure 5. On Resistance vs. VD (VS) for Different Temperatures, VDD = 5 V Rev. B | Page 7 of 16 Figure 8. Leakage Current vs. Temperature, VDD = 3.3 V 07461-008 0.1 ADG852 Data Sheet 70 0 VDD = 5V –10 TA = 25°C VDD = 5V, 3.3V –20 50 ATTENUATION (dB) 40 30 VDD = 3V 20 VDD = 2.5V 07461-009 0 1 2 3 –40 –50 –60 –70 10 0 –30 4 5 –80 –90 0.1 6 1 SOURCE VOLTAGE (V) Figure 9. Charge Injection vs. Source Voltage 10 FREQUENCY (MHz) 100 07461-012 CHARGE INJECTION (pC) 60 1k Figure 12. Off isolation vs. Frequency 35 0 –10 30 TA = 25°C VDD = 5V, 3.3V S1 to S2 –20 tON (3.3V) CROSSTALK (dB) TIME (ns) 25 20 tON (5V) 15 tOFF (5V) 10 –30 –40 –50 –60 –70 –80 tOFF (3.3V) –40 –20 0 20 40 60 80 –90 –100 0.1 100 TEMPERATURE (°C) Figure 10. tON/tOFF Times vs. Temperature 1 10 FREQUENCY (MHz) 100 1k 07461-013 0 –60 07461-010 5 Figure 13. Crosstalk vs. Frequency 0.25 0 –2 VDD = 3.6V THD + N (%) –6 –8 –10 –12 0.15 VDD = 4.2V 0.10 VDD = 5.5V TA = 25°C VDD = 5V, 3.3V 0.05 –16 0.1 1 10 FREQUENCY (MHz) 100 1k 0 100 1k 10k FREQUENCY (Hz) 100k 07461-014 –14 07461-011 INSERTION LOSS (dB) 0.20 –4 Figure 14. Total Harmonic Distortion + Noise (THD+N) vs. Frequency Figure 11. Bandwidth Rev. B | Page 8 of 16 Data Sheet ADG852 0 TA = 25°C VDD = 5V, 3.3V –20 –60 –80 –100 –120 –140 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 1G 07461-015 PSRR (dB) –40 Figure 15. PSSR vs. Frequency Rev. B | Page 9 of 16 ADG852 Data Sheet TEST CIRCUITS IDS IS (OFF) VS D VS D 07461-020 A VD 07461-019 S ID (OFF) S A V1 RON = V1/IDS Figure 17. Off Leakage Figure 16. On Resistance D A VD Figure 18. On Leakage VDD 0.1µF VDD S1B S1A VS VOUT D RL 50Ω IN 50% VIN CL 35pF 50% 90% 90% GND tON tOFF 07461-022 VOUT Figure 19. Switching Times, tON, tOFF VDD 0.1µF 50% VDD S1B S1A VS VIN 80% RL CL 35pF 50Ω IN VOUT VOUT D 50% 0V 80% tBBM tBBM 07461-023 GND Figure 20. Break-Before-Make Time Delay, tBBM VDD SWITCH ON S1B NC D S1A VOUT 1nF IN VOUT ΔVOUT QINJ = CL × ΔVOUT GND Figure 21. Charge Injection Rev. B | Page 10 of 16 07461-024 VS SWITCH OFF VIN 07461-021 ID (ON) S NC Data Sheet ADG852 VDD VDD 0.1µF 0.1µF S1B S1A 50Ω VOUT 50Ω VS D GND OFF ISOLATION = 20 log VS NETWORK ANALYZER 50Ω S1A VS D RL 50Ω GND VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 23. Bandwidth Rev. B | Page 11 of 16 RL 50Ω VS GND VOUT VS Figure 24. Channel-to-Channel Crosstalk (S1 toS2) VDD VDD D S2 CHANNEL-TO-CHANNEL CROSSTALK = 20 log 0.1µF INSERTION LOSS = 20 log RL 50Ω VOUT Figure 22. Off Isolation S1B VDD S1 50Ω VOUT 07461-025 RL 50Ω 07461-026 NC NETWORK ANALYZER 07461-027 NETWORK ANALYZER VDD ADG852 Data Sheet TERMINOLOGY IDD CD, CS (On) Positive supply current. On switch capacitance. Measured with reference to ground. VD (VS) CIN Analog voltage on Terminal D and Terminal S. Digital input capacitance. RON tON Ohmic resistance between Terminal D and Terminal S. Delay time between the 50% and 90% points of the digital input and switch on condition. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch. ∆RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection Measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation Measure of unwanted signal coupling through an off switch. Crosstalk Measure of unwanted signal that is coupled from one channel to another as a result of parasitic capacitance. −3 dB Bandwidth Frequency at which the output is attenuated by 3 dB. Insertion Loss The loss due to the on resistance of the switch. THD + N Ratio of the harmonics amplitude plus noise of a signal to the fundamental. Rev. B | Page 12 of 16 Data Sheet ADG852 OUTLINE DIMENSIONS 0.20 DIA TYP 0.55 0.40 0.30 1.30 PIN 1 IDENTIFIER 9 1 1.60 0.40 BSC 4 BOTTOM VIEW TOP VIEW 0.60 0.55 0.50 6 0.35 0.30 0.25 0.05 MAX 0.02 NOM 033007-A 0.20 BSC SEATING PLANE Figure 25. 10-Lead Lead Frame Chip Scale Package [LFCSP_UQ] 1.30 mm × 1.60 mm Body, Ultrathin Quad (CP-10-10) Dimensions shown in millimeters ORDERING GUIDE Model1 ADG852BCPZ-REEL7 Temperature Range −40°C to +85°C Package Description 10-Lead Lead Frame Chip Scale Package (LFCSP_UQ) Z = RoHS Compliant Part. 1 Rev. B | Page 13 of 16 Package Option CP-10-10 Branding F ADG852 Data Sheet NOTES Rev. B | Page 14 of 16 Data Sheet ADG852 NOTES Rev. B | Page 15 of 16 ADG852 Data Sheet NOTES ©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07461-0-5/12(B) Rev. B | Page 16 of 16