design - HW.cz

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design - HW.cz
design
ideas
Edited by Bill Travis
Circuit forms efficient cosine calculator
Matt Kornblum, Bradenton, FL
he circuit in Figure 1 converts a
610V analog voltage repreFigure 1
senting an angle between uMIN
and uMAX and emits a voltage equal to 10
cosu. This circuit can have an accuracy of
better than 1% over 61208 or better than
0.2% over 6908. These figures represent
an order-of-magnitude improvement
VIN
over a Taylor-series estimate for the same
range and for the same number of multiplications. The Taylor-series definition
for a cosine (with u in radians) is:
T
210V
R1
1
2
IC1
MPY634KP
X+
OUT
12
1
2
X2
VO=XY/10Z
11
Z+
6
Y+
7 Y2
Z2
SF
R3
4.64k
10k
IC2
MPY634KP
12
X+
OUT
Z+
6
4
7 Y2
Y+
R4
2
15.4k
X2
VO=XY/10Z
10
10k
R2
Z2
VOUT=COS U
IC3
+
11
10
SF 4
θ
θ
θ
+ L+
.
2! 4!
n!
The series works well for high values
of n or small angles. Generally, for n54, By manipulating Taylor-series coefficients, you can obtain better accuracy when generating cosines.
significant errors start to accumulate for
angles exceeding 6458. When you use a
12
Taylor-series expansion for better accuTAYLOR-SERIES ERROR
racies at larger angles, the number
10
Figure 2
THEORETICAL FIT
n becomes larger and demands
ACTUAL-VALUE FIT
more resources from the design. The
8
Taylor series for n54 has the form of
f(u)5a2bu21cu4, where a51, b50.5,
6
and c50.041667 (for angles in radians).
By using a least-squares curve fit to opERROR (%)
4
timize this function at n54, you can find
coefficients that allow you to obtain sig2
nificantly better accuracies over the deCOSθ = 11
2
4
n
0
Circuit forms efficient
cosine calculator ............................................87
Reference stabilizes exponential
current ..............................................................88
Microcontroller becomes
multifunctional................................................90
Circuit converts pulse width
to voltage ........................................................92
Short dc power-line pulses
afford remote control....................................94
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22
2120
290
260
230
0
30
60
90
120
ANGLE (8)
For angles greater than 6908, the revised coefficients in Figure 1 yield significant accuracy improvements in calculating cosines.
sired input range without raising the value of n to more than 4. The circuit in Figure 1 embodies this least-squares approach.
Choosing the resistor values for the cir-
cuit is relatively simple. Set R1 and R2
equal to each other (for 10V maximum
input and aP1), and determine values for
R2 and R4 by applying the following equations:
October 25, 2001 | edn 87
design
ideas
R2 =
R3
bθ2MAX
,
and
R4 =
R3
cθ4MAX
.
IC1 generates the square of VIN and
negates it. This output sums through R2
into IC3. IC2 generates the fourth power
of VIN and sums it into IC3 through R4. A
210V reference across R1 creates the “a”coefficient constant current into IC3. The
output of IC3 is the sum of the three
terms. Because IC1 is an inverting amplifier, the circuit configures the multipliers
such that the output of IC1 is positive and
the output of IC2 is negative. Choosing
the proper 0.1% resistors can improve
circuit accuracy to better than 1% for
2120 to 11208. You should use a lowoffset op amp for best results. Figure 2
shows the Taylor-series error, the theoretical fit, and the actual fit. For a fit in a
908 range, the values change slightly, and
the errors across the range become sig-
nificantly smaller. The constant “a” becomes 0.9996, b50.4962, and c50.0371.
Then, R15R3510 kV, R258.16 kV, and
R4544.2 kV.
You can use the same approach to efficiently calculate cosine and sine values
in a DSP system more rapidly than using a look-up table.
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Reference stabilizes exponential current
Tom Napier, North Wales, PA
n an antilog converter, the difference between the base voltages of two
transistors sets the ratio of their collector currents:
I
I1 / I2 = e VBE q / kT .
EXPONENTIAL
CURRENT
2.5V
REFERENCE
2
IC3
R4
3.92k
+
24.9k
2
The use of matched transistors balR3
IC1
ances the first-order temperature coeffi2.49k
+
10k
cient but leaves a temperature-dependent
R1
0.01 mF
gain term, q/kT. Classic antilog circuits
909
Q1
Q2
Q3
CURRENT
use a thermistor in the drive circuitry to
CONTROL
correct this temperature dependency.
2.49k
However, if the control input is a fraction
R2
of some reference voltage, as when you
100
R5
470
use a manual potentiometer or a DAC,
100
you can achieve an exact temperature
0.01 mF
correction by adding a second reference
transistor. Figure 1 shows three of the five
transistors in a CA3046 array. Q1
2
Figure 1
IC2
is the exponential current source,
+
and Q2 is the conventional reference transistor. IC2 forces Q2’s collector to ground
so its collector current, 1 mA in this ex- The use of a second reference eliminates temperature dependency in an antilog-ratio circuit.
ample, is simply the reference voltage divided by R3. Typically, this current equals through Q3 is a fraction of the main ref- 4 to 1, the output current has a fourthe maximum output required from Q1; erence—one-tenth in this example. De- decade tuning range that’s independent
lower currents result from negatively spite the chip temperature, the base volt- of temperature. The circuit in Figure 1 is
driving the transistor’s base.
age of Q3 is exactly the value you need to dynamically stable, using either lowThe attenuator on the base of Q1, R1, generate a 1-to-10 current ratio. Because power or fast op amps.
and R2 reduces the effects of IC1’s offset IC3’s output supplies the reference voltvoltage. IC3 drives the base of Q3 via a sec- age for the potentiometer, the ratio of the
ond attenuator, R4 and R5, forcing its col- two attenuators defines the full-scale- Is this the best Design Idea in this
lector to ground. The reference current current-adjustment range. If the ratio is issue? Vote at www.ednmag.com.
88 edn | October 25, 2001
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ideas
Microcontroller becomes multifunctional
Abel Raynus, Armatron International, Melrose, MA
microcontroller, by default, can
execute only one program at a time.
What do you do if, in a given project, you need to perform more than one
operation at a time? Add more microcontrollers to the design? In certain cases it’s unnecessary. Consider a real-life situation (Figure 1). The microcontroller
constantly generates on its Pulse output
pin a sequence of pulses with 25-msec
duration and a repetition rate of 1 or 4
sec, depending on the state of the Rate input pin. LED illumination accompanies
the pulse generation. Suppose that the
microcontroller must simultaneously
and independently perform some other
functions using the rest of its six I/O pins.
You can benefit from the fact that the
pulse duration is much smaller than the
repetition period. During this relatively
long period, the microcontroller may not
just wait for the generation of the next
pulse, but, instead, it may perform some
other operation. You organize the pulsegenerating program as an interrupt-service routine and the rest of the program as
a main program. To avoid any interference between these parts of the software,
the interrupt-service routine execution
time should be shorter than the smallest
period of pulse repetition.
Listing 1 is the assembly routine for
multifunctional operation. To make the
interrupt program repeatable after the
predetermined time interval, the best
A
choice is to use the microcontroller’s internal timer. This microcontroller has
two timing options: timer-overflow in-
terrupt and RTI (real-time interrupt).
For a 2-MHz operating frequency, the
timer overflow occurs every 0.51 msec.
LISTING 1—ROUTINE FOR MULTIFUNCTIONAL OPERATION
5V
6
MC68HC705KJ1
100k
100k
16
IRQ RESET
1
ON
START
OFF
15
OSC1
PA0
N2
N1
OSC2
RATE
14
2
CERAMIC
RESONATOR
4.0 MHz
0.1
mF
3
25 mSEC
PA1
PA4
PA5
11 PULSE
10 510
Nt
LED
7
Figure 1
Between pulses, the microcontroller can perform other tasks using the software in Listing 1.
90 edn | October 25, 2001
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You can program the RTI period to be as
long as 65.5 msec (with RT1-to-RT051to-1). To simplify the counters, it is reasonable to choose the largest value: 65.5
msec. Then, to make the repetition periods equal to 1 and 4 sec, you create the
counters modulo 16 and 62 accordingly
in the RTI routine (Listing 1). You can
see in Listing 1 that the microcontroller
waits for a high level on its Start pin to
begin pulse generation and LED lighting.
During the interval between pulses, it
performs the other operations, continuously checking the state of its Start pin.
After receiving a low level on the Start
pin, the microcontroller stops pulse gen-
erating and switches off the LED. You can
download the software for multifunctional operation from the Web version of
this article at www.ednmag.com.
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Circuit converts pulse width to voltage
James Mahoney, Linear Technology Corp, Milpitas, CA
he circuit in Figure 1 converts
SAMPLE
SAMPLE
pulse information to a clean dc voltage by the end of a single incoming
~
HOLD
pulse. In another technique, an RC filter
1 mSEC
1.5 mSEC
can convert a PWM signal to an averaged
2 mSEC
dc voltage, but this method is slow in rePULSE IN
R2
sponding. Converting low-duty-cycle
8
10k
6
7
pulse information is slower yet. The cirVCC
cuit in Figure 1 uses two low-input-biasIC1D
100k
LTC202
9
VCC
current LT1880 op amps, IC2 and IC3,
10
11
and an LTC202 quad analog
F
i
g
u
r
e
1
IC1C
switch, IC1A, IC1B, IC1C, and IC1D,
LTC202
to configure the integrator and sampleC1
R1
1
0.01 mF
and-hold stages that convert a single
49.9k
4
3
2
16
VCC
2
pulse to a dc voltage. The circuit’s output
IC2
1
3
14
15
+
LT1880
ICIA
IC3
is stable after a single pulse. This exam3
LTC202
C2
LT1880
+
IC1B
4
0.01
mF
ple shows the conversion of a low-duty2
LTC202
VCC
R4
R3
19.1k
78.7k
cycle positive pulse, whose width varies
VCC/2
from 1 to 2 msec with a period of 25
T1 T2 T3
msec, to a clean dc voltage. The input
pulse starts, stops, and resets the inteNOTE:
SWITCHES SHOWN IN SAMPLE MODE.
grator and controls the input to the sample-and-hold stage. After the reset operV1 AT T1: 1 mSEC
ation, the positive pulse level-triggers the
V2 AT T2: 1.5 mSEC
integrator, comprising R1, C1, and IC2.
V3 AT T3: 2 mSEC
The sample-and-hold stage, comprising
IC1B, C2, and IC3, is in the sample mode, This circuit yields a clean dc voltage that indicates the width of an incoming pulse.
sampling the output of the integrator,
3
while the incoming pulse is high.
When the incoming pulse goes low, the
2.5
circuit disconnects the input to the sample-and-hold stage, putting it into hold
mode. The integrator then stays in the re2
set state until the next positive pulse arVOUT (V)
rives. During reset, analog switch IC1A
1.5
opens to disconnect the integraF
i
g
u
r
e
2
tor’s input, switch IC1C closes to
1
reset integration capacitor C1, and switch
IC1B opens to disconnect the input to the
0.5
sample-and-hold stage, placing the stage
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
PULSE WIDTH (mSEC)
in hold mode. Analog switch IC1D inverts
the on/off states of switch IC1C. The The circuit in Figure 1 linearly converts a pulse width to a dc voltage.
T
92 edn | October 25, 2001
1
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ideas
LT1880 op amp is a good choice for the
integrator and sample-and-hold stages
because of its maximum input-bias current of 900 pA at 258C and maximum of
1500 pA maximum over the full 240 to
+858C ambient-temperature range. Another benefit of the LT1880 is its maximum input-offset-voltage drift of 1.2
mV/8C. Integrator capacitor C1 and resistor R1 set the conversion gain.
You should use polypropylene, poly-
styrene, or Teflon capacitors for C1 and
C2 to minimize integrator drift and sample-and-hold droop rate. The voltage ratio that resistors R3 and R4 set establishes the dc level at the positive pulse’s
midrange value: 1.5 msec in this example. Figure 2 shows input pulse width
versus output voltage. You can easily
modify the circuit in Figure 1 to yield different conversion gains, output levels,
and swings for different pulse widths.
The circuit operates with pulse-width information and not duty-cycle values. The
sample-and-hold stage is an analogmemory element that reveals the dc-voltage equivalent for this pulse width.
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Short dc power-line pulses afford remote control
Tom Hornak, Portola Valley, CA
f you face the challenge of
extra zener diode, D4, creates a
adding a second, independentpositive 5V dc bias in V2. The filS1
S2
HOT
HOT
ter outputs V1 and V2 drive inly controlled light source to an
verting Schmitt triggers IC1 and
existing ceiling lamp conD1
12V
12V
D2
Figure 1
IC2. Inserting zener diode D1 by
trolled by a wall switch, you
TO LAMPS
120V AC
1N2976B
1N2976B
pushing S1 in Figure 1 changes V1
may find that stringing a second
from 0V to 5V and V2 from 5V to
power line is impossible. First, you
NEUTRAL
10V. Inserting D2 in Figure 1 by
can replace the wall switch by the
circuit in Figure 1. Pushing the on This circuit creates dc pulses for use with control circuitry locat- pushing S2 changes V1 from 0V to
25V and V2 from 5V to 0V. Note
switch S1 or S2 for approximately ed at the load.
1 sec inserts the 12V zener
that the input-protection
W2
diodes D1 or D2 in series
diodes of IC1 and IC2 limit
with the hot wire of the
the voltage swings of V1 and
R1
V2. The output V3 of IC3 repower line. During the
50
V3
100k
100k
V1
C1
sponds to pushing S1 by a
push, the polarity-dependIC3
IC1
1 mF
positive transition and has
ent conduction of the zen600V
OF 74HC14
1 mF
no response to pushing S2.
er diodes creates a small
1 mF
VDD
D4
D
The output V4 of IC2 repositive (negative for D2)
1
12V 100k
V2
V4
100k
IC2
dc component across the
sponds to pushing S2 by a
C
2
6V
D3
1 mF
1 mF
330 mF
positive transition and has
line and only slightly reno response to pushing S1.
duces the line’s 120V-ac
W1
Figure 3 shows the seccomponent. A control cirond part of the control circuit at the lamps’
This control circuit uses dc pulses from the circuit in Figure 1 to
Figure 2
cuit located at the lamps’
site reacts selecdrive triacs in the circuit in Figure 3.
site. Signals V3 and V4 in
tively to the polarity of this
dc pulse and controls the power to the W1 and W2. Current through capacitor C1 Figure 2 drive the clock input of toggle
two lamps. The required power rating of and resistor R1 creates a 60-Hz square flip-flops IC1 and IC2, respectively. For
the two zener diodes depends on the load wave across the 6V zener diode, D3. Diode clarity, Figure 3 doesn’t show the concurrent. The short duration and low duty D1 and filter capacitor C2 generate a dc nections of the flip-flops of Q to D and
cycle of the activation are helpful. The supply voltage of VDD55V for the control the Set terminal to VDD. When you push
1N2976 diodes in Figure 1 are rated for circuit’s active elements. Two two-stage switch S1 in Figure 1, the positive transiRC filters connected to W2 create V1 and tion in V3 toggles flip-flop IC1. Similarly,
continuous dissipation of 10W.
Figure 2 shows the first part of the V2, with reference to W1. The filters at- when you push S2, the positive transition
control circuit located at the lamps’ site, tenuate the 120V-ac voltage between W1 in V4 toggles flip-flop IC2. Thus, you can
including the two leads of the power line, and W2 to a subvolt level in V1 and V2. An independently control the states of flip-
I
3
6
94 edn | October 25, 2001
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design
ideas
flops IC1 and IC2 by pushing S1 and S2, re- must quickly pull down the flip-flops’ Reset does not release before VDD reachspectively. To drive the two lamps, the Q Reset terminal, which is independent of es its full value.
outputs of the flip-flops drive the gates of VDD’s slowly dropping level. Diode D2
Note that you can use this Design Idea
triacs TR1 and TR2 via coupling resistors (driven by the 60-Hz square wave across in other applications. For example, if you
R2 and R3. The MT2 termiomit the circuit in
W2
nal of each triac drives the
Figure 3, the transilamps, L1 and L2, retions in V3 and V4 can
OF 74HC14
L1
L2
Figure 3
D2
V5
spectively. Pushing S1
drive
an up/down
FROM
IC4
IC5
D4
changes the state of lamp L1;
counter that can per74HC74 2N6072B MT2
TR2
pushing S2 changes the state
form an auxiliary
V3
FLIPMT1
TO THE
FLOP
R5
of lamp L2. Thus, you have
control function for a
R2
FLIP-FLOP
R4
D3
C3
100k
500
RESETS
2N6072B MT2
100k
330 mF
independent control of
device that the ac line
TR1
both lamps on a single powpowers. If you insert
V4
MT1
FLIPC4
FLOP
er line. In this application,
an additional conR3
1 mF
500
you want to keep each
ventional switch in
W1
lamp’s terminals safely conseries with the circuit
nected to the hot and neu- Triacs independently control two loads based on signals from a pair of wall switches.
in Figure 1, it can
tral wires. Therefore, you
turn on and off the
make W1 the hot wire and W2 the neutral zener diode D4), capacitor C3, and resis- power to the device. If the application rewire.
tor R4 act as an auxiliary rectifier supply- quires control signals near ground level,
With the control circuit, the state of ing voltage V5. When power experiences wire W1 should be the neutral lead of the
the flip-flops becomes uncertain if, after an interruption, V5 drops to 0V much power line, and W2 should be the hot
an interruption, the ac power returns. faster than VDD. V5 drives the cascade of lead. However, make sure that the powThis situation is unacceptable because inverting Schmitt triggers IC4 and IC5, ered device is not an inductive load bethe lamps could turn on and stay on for which then quickly pull down the flip- cause it can short out the controlling dc
an uncontrollable length of time. There- flops’ Reset terminals via diode D3. When pulses.
fore, you add a power-up reset circuit power returns, the Reset terminals pull
(Figure 3). To guarantee a safe reset also up slowly via resistor R5. The R5C4 time Is this the best Design Idea in this
for short interruptions, the reset circuit constant guarantees that the flip-flops’ issue? Vote at www.ednmag.com.
2
6
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