Datasheet PT6866 V1.0

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OLED Driver IC
PT6866
DESCRIPTION
PT6866 is a single-chip CMOS OLED driver with a controller for O/PLED (organic/polymer light
emitting diode) dot-matrix graphic display systems. PT6866 consists of 132 high voltage/current
driving output pins for driving 132 segments and 64 commons plus 1 icon line driving common. This IC
is designed for Common Cathode type OLED panels.
PT6866 displays data directly from its internal 132x65 bit GDDRAM (Graphic Display Data RAM).
Data/Commands are sent from the general MCU through a pin-selectable 6800- or 8080-series
compatible Parallel Interface, a Serial Peripheral Interface, or I2 C Interface.
PT6866 reduces the number of external components by including a brightness control function and an
on-chip oscillator.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Supports max. 132x(64+1) matrix panel
Power supply to logic system: 2.4V-5V
Power supply to OLED system: 7.0V-16V
Segment output maximum current: 400µA
Common sink maximum current: 40mA
Half range and full range current mode selection
LOW current sleep mode (<5.0uA)
External current reference control by external resistor
256-step brightness control on monochrome passive OLED panel
On-Chip Oscillator
Programmable Frame Rate
8-bit 6800-series Parallel Interface, 8-bit 8080-series Parallel Interface, Serial Peripheral
Interface and I2 C Interface
Embedded 132x65 bit SRAM display buffer
Row and Column re-mapping
Vertical scrolling
Supports Partial display
TCP, COF and Gold Bump Chip available
PT6866 V1.0
-1-
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OLED Driver IC
PT6866
COM63
COM0
COM63
COM0
ICONS
BLOCK DIAGRAM
SEG Current Source/COM Switch
(65+132) Bit Latch
FR
Display
Timing
Generator
DOF#
M/S#
CL
CCL
VDD
OLED
Driving
Current
Control
Block
Oscillator
V16
SEGG
BVR
GDDRAM
132 x 65 Bits
Command Decoder
VDD
V16
PT6866 V1.0
-2-
D0
D1
D2
D3
D4
D5
D6[SCLK]
D7[SDA]
I/S#
Parallel/Serial Interface
CMPU
R/W#(WR#)
E(RD#)
RS
CS2
CS1#
P/S#
RES#
Command Interface
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OLED Driver IC
PT6866
PIN DESCRIPTION
FR, DOF#
These pins are No Connection pins. These pins should be left open individually.
CL
This pin is the system clock input. When internal clock is enabled, this pin should be left open. Nothing
should be connected to this pin. When internal oscillator is disabled, this pin receives display clock
signal from external clock source.
CS1#, CS2
These pins are the chip select inputs. The chip is enabled for MCU communication only when CS1# is
pulled LOW and CS2 is pulled HIGH.
RES#
This pin is reset signal input. When the pin is LOW, initialization of the chip is executed.
RS
This pin is Data/Command control pin. When the pin is pulled HIGH, the data at D7-D0 is treated as
display data. When the pin is pulled LOW, the data at D7-D0 will be transferred to the command
register. For detail relationship to MCU interface signals, please refer to the Timing Characteristics
Diagrams.
R/W#(WR#)
This pin is MCU interface input. When interfacing to a 6800-series microprocessor, this pin will be used
as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and
write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input.
Data write operation is initiated when this pin is pulled LOW and the chip is selected.
E (RD#)
This pin is MCU interface input. When interfacing to a 6800-series microprocessor, this pin will be used
as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is
selected. When connecting to an 8080-microprocessor, this pin receives the Read (RD#) signal. Data
read operation is initiated when this pin is pulled LOW and the chip is selected.
D7-D0
These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When
serial mode is selected, D7 will be the serial data input (SDA) and D6 will be the serial clock input
(SCK). When I2C mode is selected, D6 will be the clock signal (SCL) and D7 will be the I2C data input
(SDA). Refer to the configuration of I2C interface.
PT6866 V1.0
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OLED Driver IC
PT6866
SEGG
This pin is reference voltage, which is used to deliver a reference voltage for Seg Cells. The pin should
be connected to VSS.
VDD Power Supply Pin
This is also the reference for the OLED driving voltages. It must be connected to external source.
VSS Ground
It also acts as a reference for the logic pins. It must be connected to external ground.
V16
This is the most positive voltage supply pin of the chip. It is supplied externally.
M/S#
This pin is the selection input. This pin must be pulled HIGH; the chip function is as master.
CCL
This pin is internal clock enable. When this pin is pulled HIGH, internal clock is enabled. The internal
clock will be disabled with it is pulled LOW; an external clock source must be connected to CL pin for
normal operation.
CMPU
This pin is MCU parallel interface selection input. When the pin is pulled HIGH, 6800 series interface is
selected and when the pin is pulled LOW, 8080 series interface is selected. If Serial Interface is
selected (P/S# pulled LOW), the setting of this pin is ignored, but must be connected to a known logic
(either HIGH or LOW).
P/S#
This pin is parallel interface selection input. When this pin is pulled HIGH, parallel interface mode is
selected. When this pin and I/S# pins are pulled LOW, serial peripheral interface is selected.
Note: Read data operation is only available in parallel mode.
I/S#
This pin is serial interface selection input. When this pin pulled HIGH and P/S# pulled LOW, I2C
interface is selected.
COM0-COM63
These pins provide the Common switch signals to the OLED panel.
SEG0-SEG131
These pins provide the OLED segment driving signals. The output voltage level of these pins is in
HIGH impedance stage when display is OFF.
PT6866 V1.0
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OLED Driver IC
PT6866
ICONS
There are two ICONS pin on the chip. They are the common pins for the icon row. Both pins output
exactly the same signal. The reason for duplicating the pin is to enhance the flexibility of the OLED
layout.
BVR
This pin is current reference pin. A resistor (130KΩ) should be connected between this pin and VSS.
PT6866 V1.0
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OLED Driver IC
PT6866
FUNCTIONAL BLOCK DESCRIPTION
COMMAND DECODER AND COMMAND INTERFACE
This module determines whether the input data is interpreted as data or a command. Data is
interpreted based upon the input of the RS pin. If the RS pin is HIGH, data is written to GDDRAM. If it
is LOW, the input at D7-D0 is interpreted as a command and will be decoded and written to the
corresponding command register.
MPU PARALLEL 6800-SERIES INTERFACE
The parallel interface consists of 8 bi-directional data pins (D0-D7), R/W# (WR#), RS, E (RD#), CS1#
and CS2. RW# (WR#) HIGH input indicates a read operation from the GDDRAM or the status register.
RW# (WR#) LOW input indicates a write operation to Display Data RAM or Internal Command
Registers, depending on the status of the RS input.
The E (RD#) input serves as a data latch signal (clock) when HIGH, provided that CS1# and CS2 are
LOW and HIGH respectively. In order to match the operating frequency of display RAM with that of the
microprocessor, some pipeline processing is performed internally which requires the insertion of a
dummy read before the first actual display data read. This is shown in the below.
R/W#(WR#)
E(RD#)
Data Bus
N
Write column address
PT6866 V1.0
Dummy read
-6-
n
n+1
Data read 1
Data read 2
n+2
Data read 3
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OLED Driver IC
PT6866
MPU PARALLEL 8080-SERIES INTERFACE
The Parallel interface consists of 8 bi-directional data pins (D7-D0), E (RD#), R/W# (WR#), RS, CS1#
and CS2. The E (RD#) input serves as data read latch signal (clock) when LOW, provided that CS1#
and CS2 are LOW and HIGH respectively.
Display data or status register read is controlled by RS.R/W# (WR#) input serves as data write latch
signal (clock) when HIGH provided that CS1# and CS2 are LOW and HIGH respectively.
Display data or command register write is controlled by RS (refer to timing characteristics for Parallel
Interface Timing Diagram of 8080-series microprocessor). Similar to the 6800-series interface, a
dummy read is also required before the first actual display data read.
MPU SERIAL PERIPHERAL INTERFACE
The serial peripheral interface consists of serial clock SCK, serial data SDA, RS, CS1# and CS2. SDA
is shifted into an 8-bit shift register on every rising edge of SCL in the order of D7, D6,…..D0, RS is
sampled on every eighth clock and the data byte in the shift register is written to the Display Data RAM
or command register in the same clock.
MPU I2C INTERFACE
I2C-bus data signal SDA and I2C-bus clock signal SCL. The data signal must be connected to pull-up
resistor. There are also five input signals including, RES#, CS1#, CS2, P/S#, I/S#, which is used for the
initialization of device.
OSCILLATOR CIRCUIT
The below is an On-Chip LOW power RC oscillator circuitry. The oscillator generates the clock for the
Display Timing Generator.
Oscillator
enable
enable
Oscillator Circuit
enable
Buffer
(CL)
Internal Resistor
OSC1
PT6866 V1.0
OSC2
-7-
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OLED Driver IC
PT6866
OLED DRIVING CURRENT CONTROL BLOCK
This block is used to divide the incoming power sources into the different levels of internal use voltage
and current. V16 and VDD are external power supplies. SEGG is reference voltage, which is used to
deliver a reference voltage for Seg Cells. BVR is a reference current source for Seg Cells current
drivers.
GDDRAM
The GDDRAM is bit mapped static RAM holding the bit pattern to be displayed. The size of the RAM is
132×65=8580 bits. For mechanical flexibility, re-mapping on both Segment and Common outputs can
be selected by software. For vertical scrolling of the display, an internal register storing display start
line can be set to control the portion of the RAM data to be mapped to the display.
197 BIT LATCH
A register carries the display signal information. In 132×65 display mode, data will be fed to the
Seg/Com Cell and output to the required voltage/current level respectively.
SEG/COM CELL
Seg current source drives deliver 132 current sources to drive OLED panel. It uses current source to
drive the Seg Cell where the driving current can be adjusted by 256 steps.
PT6866 V1.0
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OLED Driver IC
PT6866
COMMAND TABLE
(Based on the 80 port MPU; the RD and WR commands differ for the 68 port MPU)
1
0
0
1
0
1
0
0
0
1
1
0
0
1
0
1
0
0
0
0
0
0
LSB Column
Address
Set the LSB column address of the Display
RAM in the column address register. Column
Address is composed of 8 bits.
1
0
0
0
0
0
1
MSB Column
Address
Set the MSB column address of the Display
RAM in the column address register. Column
Address(0-131), (POR)*7
<6>
Status Read
0
1
0
<7>
Display Data
Write
1
0
1
<8>
Display Data
Read
0
1
1
Multiplex Ratio
Set
1
0
0
1
<9>
1
0
0
x
1
0
0
1
0
0
1
x
x
x
Frame
<10>
Frequency Set
<11>
COM Output
Mode Select
1
0
0
1
<12>
ADC Select
1
0
0
1
<13>
Static Drive
ON/OFF
1
0
0
1
1
0
0
1
1
0
0
1
0
0
<14> Brightness Set
<15>
Read Modify
Write
PT6866 V1.0
1
Read the status. Busy 1: Busy (internal
processing) 0: Ready status ADC 1: Rightward
0 0 0
0 (forward) Output 0: Leftward (reverse) Output
ON/OFF 1: Display OFF. 0: Display ON
RESET 1: Resetting. 0: Normal
Write the data on These commands access
Write Data
the data bus to
a previously-specified
RAM
address of the Display
Read data from the RAM, after which the
Read Data
Display RAM onto column address is
incremented by one.
the data bus.
0 1 0 1 0 0
0 Double byte command
Select multiplex duty Max. ratio : 65(POR) ;
x
Ratio Factor (0-63)
SN=RF+2
0 1 0 1 0 1
0 Double byte command
1 0 0 0 0 0
1 Fosc/(4*DF)
1 0 0 0 0 1
0 Fosc/(6*DF) for DF=65(POR)
1 0 0 0 0 1
1 Fos/(8*DF)
Select COM output scan direction 0:Normal
1 0 0 0/1 x x
x
Direction (POR)*9 + 1:Reverse Direction
Used to reverse the correspondence between
the Display RAM’s column address and
0 1 0 0 0 0 0/1 segment driver output ports 0: Rightward
(forward)output (POR)*3 + 1: Leftward
(reverse) output
Select normal display operation or static all-lit
0 1 0 0 1 0 0/1 drive display operation. 1: Static drive (power
save)* 0: Normal display (POR)*4
0 0 0 0 0 0
1 Double byte command
Select the brightness factor for driving OLED
Brightness Level (0-255)
cells. Brightness Level : 128 (POR)*12
Increase column address counter by 1 when
1 1 0 0 0 0
0 display is written. (This is not done when data
is read)
-9December, 2004
RESET
Display Start
Line Set
Page Address
<3>
Set
LOWer
Column
<4>
(segment)
Address Set
HIGHer
Column
<5>
(segment)
Address Set
<2>
Function
Switch the entire display ON or OFF,
regardless of the Display RAM’s data or the
1 0 1 1 1 0/1
internal status. 1:ON 0:OFF (POR)*1, (power
save)*
Display START address Determine the line of RAM data to be displayed
(0-63)
at the display’s top line [COM0]. (POR)*6
Set the page of the Display RAM in the page
1 1
Page (0-8)
address register. (POR)*8
ON/OFF
Display
ON/OFF
ACC
<1>
RDB WRB RS D7 D6 D5 D4 D3 D2 D1 D0
BUSY
Command
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OLED Driver IC
PT6866
Command
<16>
End
<17>
<18>
<19>
<20>
<21>
<22>
<23>
<24>
<25>
RDB WRB RS D7 D6 D5 D4 D3 D2 D1 D0
Function
1
0
0
1 1 1 0 1 1 1
0 Cancel the Read Modify Write mode. (POR)*5
Reset the Display Start Line to the 1st line in the
register. Resets the column address counter to
Reset
1
0
0
1 1 1 0 0 0 1
0
0 and page address to 0. Read modify write
mode is OFF. COM scan is normal direction.
Icon Mode Set 1
0
0
1 1 0 1 0 0 0 0/1 0:Icon mode OFF (POR)*2 1:Icon mode ON
Display Mode
1
0
0
1 0 1 0 0 1 1 0/1 0:Normal display (POR)*4 1:inverse display
Set
1
0
0
1 1 0 1 1 0 1
0 Double byte command
Current Mode
0:half range current mode (POR) 1:full range
Set
1
0
0
x x x 1 x x 0/1 0
current mode
1
0
0
1 1 0 1 1 0 0
1 Double byte command
Pre-charge &
Pre-charge period (POR)*13
Pre-charge
Zero Period
Zero Period
1
0
0
Period (0~15)
(0~15)
Select
Invalid entry is 0 Invalid entry is 0 Zero period (POR)*14
1
0
0
1 0 1 0 1 0 1
1 Double byte command
Bias Current
1 0 0 0 1 0 0
0 Normal (POR)
1
0
0
1 0 1 0 0 0 0
1 LOW Bias Current Mode
1
0
0
1 1 0 1 0 0 1
1 Double byte command
Display Offset
1
0
0
x x Scroll row number (0-63) Com output sequence (POR)*15
1
0
0
1 1 0 1 1 0 0
0 Double byte command
LOW Power
0 0 0 0 0 0 0
0 Normal (POR)
Display
1
0
0
0 0 0 0 0 1 0
1 LOW power consumption
NOP
1
0
0
1 1 1 0 0 0 1
1 Command for NO Operation
Notes: * With display OFF (command <1>), static drive on (command <13>) invokes power-saving
mode.
* For power-saving mode (sleep mode)
1. Sleep mode can be exited by the issue of a new software command.
2. Internal oscillator is stopped
3. OLED power supply circuits is turned OFF
4. Segment and Common drivers output HIGH impedance level
5. The display data and operation mode before sleep are held
6. Internal display RAM can still be accessed
* When the power is turned on, the IC internal state becomes unstable, and it is
necessary to initialize it using the RES# terminal. When RES# input is LOW the chip is
initialized as follows:
1.
Display is OFF
2.
132x(64+1) Display Mode
3.
ADC is Forward
4.
Normal display
5.
Read Modify Write is OFF
6.
Display start line is set at display RAM address 0
7.
Column address counter is set at 0
8.
Page address is set at 0
9.
COM scan is normal direction
10. Power-saving mode is cleared
11. Serial interface is cleared
PT6866 V1.0
- 10 -
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OLED Driver IC
12.
13.
14.
15.
PT6866 V1.0
PT6866
Brightness register is set at Level 10000000
Pre-charge period is set at 1000
Zero period is set at 1000
Display offset is set to COM0
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OLED Driver IC
PT6866
PIN ASSIGNMENTS
COM pin assignments for COM signals in Programmable Multiplex Ratio
Die Pad
Name
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
COM54
COM55
COM56
COM57
COM58
COM59
COM60
COM61
COM62
COM63
64 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
COM54
COM55
COM56
COM57
COM58
COM59
COM60
COM61
COM62
COM63
54 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
53 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
49 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
48 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
33 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
32 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
16 Mux Com
Signal Output
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
NON-SELECT*
Note：
*The COM will output a Non-Select COM signal.
PT6866 V1.0
- 12 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
END TIMING
Return
Column
Address
N
N+1
N+2
N+m
Read Modify Write Mode Set
N
End
CURSOR BLINKING SEQUENCE
Page Address Set
Column Address Set
Read Modify Write
Dummy Read
Data Read
Data Write
No
Modify
Ended?
End
PT6866 V1.0
- 13 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
GRAPHIC DISPLAY DATA RAM
(GDDRAM) address map with display start line set to 38h.
Column address 00H
(83H)Segment Remap Enabled
page0
page1
page2
page3
page4
page5
page6
page7
page8
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
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?
?
?
?
?
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..
..
..
..
..
..
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..
..
..
..
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..
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..
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..
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..
..
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..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
..
?
..
Column address 83H
(00H)
LSB
D0
MSB D7
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
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? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? Start
? ?
? ?
Set
Line?
? ? ?
? = 38H
? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
? ? ? ? ? ?
?
?
?
?
? ?
COM SCAN MODE
NORMAL (REMAPPED)
COM8 (COM55)
?
?
?
?
?
?
?
?
?
?
?
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?
?
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?
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?
?
?
?
?
?
?
?
COM63 (COM0)
COM0 (COM63)
COM7(COM56)
?
ICONS
(LSB)
SEG131
SEG0
Note: The configuration in parentheses represent the remapping of Rows and Columns
PT6866 V1.0
- 14 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
ABSOLUTE MAXIMUM RATING
(Unless otherwise stated, Ta=25℃)
Parameter
Supply Voltage
I/O Pin Voltage
Operating Temperature
Storage Temperature
Symbol
V16
VDD
VX
Topr
Tstg
Min
-0.3
-0.3
-0.3
-40
-65
Max.
+18
+5.5
VDD+0.3
+85
+150
Unit
V
V
V
℃
℃
*Maximum Ratings are those values beyond which damage to the device may occur. Functional
operation should be restricted to the limits in the Electrical Characteristics tables or Pin Description.
AC CHARACTERISTICS
AC Characteristics (Unless otherwise specified, Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25℃)
Symbol
FOSC
FFRM
Parameter
Test Condition
Min
Oscillation Frequency
VDD=2.7V, IBVR=8µA
35
of Display Timing
132×64 Graphic Display Mode,
Display ON, Internal Oscillator
Enabled
Frame Frequency for
65 MUX Mode
132×64 Graphic Display Mode,
Display ON, Internal Oscillator
Disabled, External clock with freq.,
Fext (Fext=Fosc/6), feeding to CL pin.
PT6866 V1.0
- 15 -
Typ
40
Fosc
Max Unit
45
kHz
Hz
6 x 65
Fext
6 x 65
Hz
December, 2004
Tel: 886-2-66296288
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OLED Driver IC
PT6866
DC CHARACTERISTICS
(Unless otherwise specified, Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25℃)
Symbol
V16
VDD
VOH
VOL
VIH
VIL
ISLEEP
I16
IDD
ISEG
Parameter
Operating Voltage
Logic Supply Voltage
HIGH Logic Output Level
LOW Logic Output Level
HIGH Logic Input Level
LOW Logic Input Level
Sleep mode Current
Test Condition
Iout=100uA
Iout=100uA
Iout=100uA
Iout=100uA
VDD=2.7V, IBVR=8uA,
No Panel attached
CS1#=Low, CS2=High
Typ
2.7
-
Max
Unit
16
V
5.5
V
VDD
V
0.1* VDD
V
VDD
V
0.2* VDD
V
-
0.2
5
580
680
µA
V16 Supply Current VDD=2.7V,
Brightness = FF
V16=9V, IBVR=8uA, Max Frame
rate, Brightness=FF, All one
Brightness = AF
pattern, Display on, No loading
VDD Supply Current VDD=2.7V,
V16=9V, IBVR=8uA, Max Frame Brightness = FF
rate, Brightness=FF, All one
pattern, Display on, No loading Brightness = AF
Normal Bias Current Mode
Brightness = FF
330
370
410
Brightness = AF
Brightness = 5F
215
100
240
130
265
145
Brightness = 0F
0
20
40
Brightness = FF
180
210
240
110
130
160
55
75
95
0
15
30
-
-
+5
﹪
-
+4.0
-
﹪
-
30
40
Ω
VDD=2.7V, V16=9V, IBVR=8uA,
All one pattern, Display on,
Segment pin under test is
connected with a 20kΩ
resistive load to VSS
LOW Bias Current Mode
VDD=2.7V, V16=9V, IBVR=8uA, Brightness = AF
All one pattern, Display on,
Brightness = 5F
Segment pin under test is
connected with a 20kΩ
Brightness = 0F
resistive load to VSS
Dev=(ISEG-IMID)/IMID
IMID=(IMAX+IMIN)/2
Segment output current
ISEG［0:131］=Segment
Dev
uniformity
current at
Brightness=FF
Adj Dev=(I［n］-I［n+1］)/
Adjacent pin output current
Adj Dev
uniformity (Brightness=FF)
(I［n］+I［n+1］)
Common Output On
V16-VSS=11.7V
RON-C
Resistance
Iout=30mA
PT6866 V1.0
Min
7
2.4
0.9* VDD
0
0.8* VDD
0
- 16 -
µA
480
-
600
700
500
µA
µA
µA
µA
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
TIMING CHARACTERISTICS
READ/WRITE CHARACTERISTICS FOR 6800 SERIES MPU
RS
R/W#
t AW6
t AW6
/CS1
(CS2="1")
t CYC6
t EWHR , t EWHW
t EWLR , t EWLW
E
t DS6
tF
t DH6
tR
D0 to D7
(Write)
t OH6
t ACC6
D0 to D7
(Read)
Item
Signal
Address hold time
Address setup time
System cycle time
Symbol
tAH6
tAW6
tCYC6
tDS6
tDH6
tACC6
tOH6
tEWHR
tEWHW
tEWLR
tEWLW
tR
tF
RS, /CS1
/CS1
Data setup time Data hold time
D0 to D7
Access time Output disable time
Enable H pulse time
Enable L pulse time
Read
Write
Read
Write
E
E
Rise Time
Fall Time
PT6866 V1.0
- 17 -
Condition
CL=100pF
Rating
Min
Max
10
—
20
—
300
—
40
—
15
—
—
140
—
70
120
—
60
—
120
—
60
—
—
15
—
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
December, 2004
Tel: 886-2-66296288
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OLED Driver IC
PT6866
Read/Write Characteristics for the 8080 Series MPU
RS
t AW8
t AW8
/CS1
(CS2="1")
t CYC8
t CCLR , t CCLW
/WR, /RD
t CCHR , t CCHW
t DS8
tR
t DH8
tF
D0 to D7
(Write)
t OH8
t ACC8
D0 to D7
(Read)
Item
Address hold time
Address setup time
System cycle time
Control L pulse width (/WR)
Control L pulse width (/RD)
Control H pulse width (/WR)
Control H pulse width (/RD)
Data setup time
Address hold time
RD access time
Output disable time
Rise Time
Fall Time
PT6866 V1.0
Signal
RS
RS
/WR
/RD
/WR
/RD
D0 to D7
Symbol
tAH8
tAW8
tCYC8
tCCLW
tCCLR
tCCHW
tCCHR
tDS8
tDH8
tACC8
tOH8
tR
tF
- 18 -
Condition
CL=100pF
Min
10
20
300
60
120
60
120
40
15
—
—
—
—
Rating
Max
—
—
—
—
—
—
—
—
—
140
70
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
SERIAL PERIPHERAL INTERFACE CHARACTERISTICS
Symbol
tcycle
tAS
tAH
tCSS
tCSH
tDSW
tDHW
tCLKL
tCLKH
tR
tF
Parameter
Clock Cycle Time
Address Setup Time
Address Hold Time
Chip Select Setup Time
Chip Select Hold Time
Write Data Setup Time
Write Data Hold Time
Clock LOW Time
Clock HIGH Time
Rise Time
Fall Time
Min
250
150
150
120
60
100
100
100
100
–
-
Typ
-
Max
15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RS
t AS
/CS1
(CS2=1)
t AH
t CSS
t CSH
t CYCLE
tCLKH
tCLKL
SCK
tF
t DSW
SDA
t DHW
tR
Valid Data
RS
/CS1
(CS2=1)
SDA
D7
D6
D5
D4
D3
D2
D1
D0
SCK
PT6866 V1.0
- 19 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
I2C INTERFACE TIMING CHARACTERISTICS
Symbol
tcycle
tHSTART
tHD
tSD
tSSTART
tSSTOP
tR
tF
tIDLE
SDA
Parameter
Clock Cycle Time
Start condition Hold Time
Data Hold Time
Data Setup Time
Start condition Setup Time (Only relevant for a
repeated Start condition)
Stop condition Setup Time
Rise Time for data and clock pin
Fall Time for data and clock pin
Idle Time before a new transmission can start
Typ Max
-
Unit
us
µs
ns
ns
0.6
-
-
µs
0.6
1.3
-
300
300
-
µs
ns
ns
µs
D7
t HSTART
SCL
Min
2.5
0.6
300
100
t HD
tF
tR
t SD
t SSTART
t DLE
t SSTOP
D6
t CYCLE
SDA
SCL
DATA LINE
STABLE
DATA VALID
CHANGE
OF DATA
ALLOWED
Bit Transfer on I2C-Bus
PT6866 V1.0
- 20 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
I2C-BUS WRITE DATA AND READ REGISTER STATUS
The I2C-bus interface gives access to write data and command into the device. Please refer to the
below for the write/Read mode of I2C-bus in chronological order.
Write Mode
1 byte
P
m > 0 words
Data Byte
ACK
Control Byte
ACK
D/C#
Co
Slave Address
Data Byte
ACK
Control Byte
ACK
D/C#
Co
0
ACK
1 1 1
R/W#
SA0
S
0 1
n > 0 bytes
MSB.......................LSB
0
SA0
1 1 1
PT6866 Slave Address
P
Status bytes
ACK
0
ACK
1 1 1
R/W#
SA0
S
0 1
0 1
R/W#
Read Mode
0
0 0 0
0 0
R/W#
D/C#
Co
Slave Address
Control byte
Note:
Co - Continuation bit
D/C# - Data/Command Selection bit
ACK – Acknowledgement
SA0 – Slave Address bit
R/W# - Read/Write Selection bit
S-Start Condition/P-Stop Condition
I2C BUS DATA FORMAT
Data Output
By Transmitter
Non-acknowledge
Data Output
By Receiver
SCL From
Master
Acknowledge
S
1
2
8
9
Clock Pulse For
Acknowledgement
START
Condition
Definition of the acknowledgement condition
PT6866 V1.0
- 21 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
WRITE MODE
1. The master device initiates the data communication by a start condition. The definition of the start
condition is shown in I2C Interface Timing Characteristics. The start condition is established by
pulling the SDA from high to low while the SCL stays high.
2. The slave address is following the start condition for recognition use. For the PT6866, the slave
address if either “b0111101” (for master device) or “b0111100” (for slave device) by changing the
SA0 to high or low.
3. The write mode is established by setting the R/W# bit to logic “0”.
4. An acknowledgement signal will be generated after receiving one byte of data, including the slave
address and the R/W# bit. Please refer to definition of the acknowledgement condition for the
graphical representation of the acknowledge signal. The acknowledge bit is defined as the SDA line
is pulled down during the high period of the acknowledgement related clock pulse.
5. After the transmission of the slave address, either the control byte or the data byte may be sent
across the SDA. A control byte mainly consists of Co and D/C# bits following by six “0”s.
• If the Co bit is set as logic “0”, the transmission of the following information will contain data bytes
only.
• The D/C# bit determines the next data byte is acted as a command or a data. If the D/C# bit is set
to logic “0”, it defines the following data byte as a command. If the D/C# bit is set to logic “1”,
it defines the following data byte as a data which will be stored at the GDDRAM. The
GDDRAM column address pointer will be increased by one automatically after each data write.
6. Acknowledge bit will be generated after receiving each byte.
7. The write mode will be finished when a stop condition is applied. The stop condition is also defined
in I2C Interface Timing Characteristics. The stop condition is established by pulling the “SDA in”
from low to high while the “SCL” stays high.
READ MODE (READ STATUS REGISTER)
1. The master device firstly initiates the data communication by a start condition. The definition of the
start condition is shown in I2C Interface Timing Characteristics.
2. The slave address is following the start condition for recognition use. For the PT6866, the slave
address is either “b0111101” (for master device) or “b0111100” (for slave device).
3. The read mode is established by setting R/W# bit to logic “1”. The read mode allows the MCU to
monitor the internal status of the chip.
4. An acknowledgement signal will be generated after sending one byte of data, including the slave
address and the R/W# bit. Please refer to the definition of the acknowledgement condition for the
graphical representation of the acknowledge signal.
5. The status of the register will be read at the next status byte. Please refer to the Command Table for
the explanation of the status byte.
6. The read mode will be finished when a stop condition is applied. The stop condition which is sent
from MCU is also defined in I2C Interface Timing Characteristics.
PT6866 V1.0
- 22 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
APPLICATION EXAMPLE
6800 SERIES INTERFACE
V16
SEGG
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
CCL
M/S#
D7
D6
D5
D4
D3
D2
D1
D0
RD#
WR#
RS
RES#
CS1#
CS2
DOF#
CL
FR
R1
VSS
VDD
VSS
VDD
VDD
D7
D6
D5
D4
D3
D2
D1
D0
E
R/W#
RS
RES#
CS1#
CS2
COM62
COM60
COM58
COM56
PT6866
COM2
COM0
ICONS
SEG0
SEG1
SEG100
SEG101
COM1
COM3
OLED PANEL
(132 x 65 Dots)
COM59
COM61
COM63
ICONS
8080 SERIES INTERFACE
V16
SEGG
VSS
VDD
VSS
VDD
VSS
VDD
D7
D6
D5
D4
D3
D2
D1
D0
RD#
W/R#
RS
RES#
CS1#
CS2
PT6866 V1.0
R1
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
CCL
M/S#
D7
D6
D5
D4
D3
D2
D1
D0
RD#
WR#
RS
RES#
CS1#
CS2
DOF#
CL
FR
COM62
COM60
COM58
COM56
PT6866
COM2
COM0
ICONS
SEG0
SEG1
OLED PANEL
(132 x 65 Dots)
SEG100
SEG101
COM1
COM3
COM59
COM61
COM63
ICONS
- 23 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
SERIAL PERIPHERAL INTERFACE
V16
SEGG
R1
VSS
VDD
VSS
VDD
SDA
SCK
VSS
RS
RES#
CS1#
CS2
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
CCL
M/S#
D7
D6
D5
D4
D3
D2
D1
D0
RD#
WR#
RS
RES#
CS1#
CS2
DOF#
CL
FR
COM62
COM60
COM58
COM56
PT6866
COM2
COM0
ICONS
SEG0
SEG1
OLED PANEL
(132 x 65 Dots)
SEG100
SEG101
COM1
COM3
COM59
COM61
COM63
ICONS
I2C INTERFACE
V16
SEGG
R1
VSS
VDD
VSS
VDD
SDA
SCL
VSS
R2
RES#
CS1#
CS2
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
CCL
M/S#
D7
D6
D5
D4
D3
D2
D1
D0
RD#
WR#
RS
RES#
CS1#
CS2
DOF#
CL
FR
COM62
COM60
COM58
COM56
PT6866
COM2
COM0
ICONS
SEG0
SEG1
OLED PANEL
(132 x 65 Dots)
SEG100
SEG101
COM1
COM3
COM59
COM61
COM63
ICONS
Note: R1 = 130KΩ, R2 = 10KΩ
PT6866 V1.0
- 24 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
CONNECTIONS BETWEEN OLED DRIVERS (REFERENCE EXAMPLE)
The OLED display area can be enlarged with ease through the use of multiple PT6866 Series chips.
Use a same equipment type.
VDD
M/S
FR
FR
CL
CL
Output
PT6866 Series
Slave
PT6866 Series
Master
M/S
Input
VSS
TYPICAL CONNECTIONS WITH OLED PANEL (REFERENCE
EXAMPLES)
(1) SINGLE-CHIP STRUCTURE
132 x 65 Dots
COM
SEG
COM
PT6866 Series
Master
(2) DOUBLE-CHIP STRUCTURE
264 x 65 Dots
COM
SEG
SEG
PT6866 Series
Master
PT6866 V1.0
COM
PT6866 Series
Slave
- 25 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
PAD CONFIDURATION
DUMMY
DUMMY
COM61
COM63
ICONS
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
326
327
302
303
325
VDD
301
300
299
298
297
DUMMY
DUMMY
VSS
COM45
COM43
277
276
COM3
COM1
275
274
SEG131
SEG130
Die Size: 11376µm×1944µm
Pad Size:
Pad 1-91, 326, 327: 38µm×38µm
Pad 92~115, 116~301, 302~325: 28µm×53µm
1
V16
SEGG
VSS
VDD
FR
a
CL
DOF#
VSS
CS1#
Gold Bumps Size:
Pad 1~91, 326, 327: 50µm×50µm
Pad 92~115, 116~301, 302~325: 40µm×65µm
CS2
VDD
RES#
RS
VSS
R/W#(WR#)
E(RD#)
I/O pad pitch (a):113µm
SEG pad pitch (b):60µm
COM pad pitch (c): 60µm
VDD
D0
D1
D2
D3
D4
D5
D6
D7
VDD
M/S#
CCL
VSS
CMPU
P/S#
VDD
229
SEG87
SEG86
V16
SEG85
SEG84
168
167
166
165
164
SEG25
SEG24
V16
SEG23
SEG22
142
SEG3
SEG2
SEG1
SEG0
I/S#
VDD
VSS
V16
37
VSS
38
Y
VSS
VSS
X
b
VSS
71
V16
72
V16
V16
VDD
VDD
TESTOUT
VSS
VSS
BVR
SEGG
VSS
VSS
141
VSS
VDD
ICONS
COM0
COM2
VDD
VDD
V16
DUMMY
DUMMY
90
91
c
116
COM40
COM42
VSS
DUMMY
DUMMY
DUMMY
COM60
COM62
VSS
DUMMY
DUMMY
PT6866 V1.0
115
89
92
VDD
- 26 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
PAD LOCATION (UNIT: µM)
Pad NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
PT6866 Pad Name
VDD
V16
SEGG
VSS
VDD
FR
CL
DOF#
VSS
CS1#
CS2
VDD
RES#
RS
VSS
R/W#(WR#)
E(RD#)
VDD
D0
D1
D2
D3
D4
D5
D6
D7
VDD
M/S#
CCL
VSS
CMPU
P/S#
VDD
I/S#
VDD
VSS
V16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V16
V16
V16
VDD
VDD
TESTOUT
VSS
VSS
BVR
SEGG
VSS
VSS
VSS
VDD
VDD
VDD
V16
VDD
DUMMY
DUMMY
DUMMY
DUMMY
VSS
COM62
PT6866 V1.0
X-pos
-4691.4
-4578.4
-4465.4
-4352.4
-4239.4
-4126.4
-4013.4
-3900.4
-3787.4
-3674.4
-3561.4
-3448.4
-3335.4
-3222.4
-3109.4
-2996.4
-2883.4
-2770.4
-2657.4
-2544.4
-2431.4
-2318.4
-2205.4
-2092.4
-1979.4
-1866.4
-1753.4
-1640.4
-1527.4
-1414.4
-1301.4
-1188.4
-1075.4
-962.4
-849.4
-736.4
-621.5
-441.9
-349.7
-257.5
-165.3
-73.1
19.1
111.3
203.5
295.7
387.9
480.1
572.3
664.5
756.7
848.9
941.1
1033.3
1125.5
1217.7
1309.9
1402.1
1494.3
1586.5
1678.7
1770.9
1863.1
1955.3
2047.5
2139.7
2231.9
2324.1
2416.3
2508.5
2600.7
2782.2
2895.2
3008.2
3121.2
3234.2
3347.2
3460.2
3573.2
3686.2
3799.2
3912.2
4025.2
4138.2
4251.2
4364.2
4477.2
4590.2
4703.2
5542.9
5629.1
5629.7
5629.7
5629.7
5629.7
Y-pos
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-833.2
-685
-625
-565
-505
Pad No.
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
PT6866 Pad Name
COM60
COM58
COM56
COM54
COM52
COM50
COM48
COM46
COM44
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
VSS
COM42
COM40
COM38
COM36
COM34
COM32
COM30
COM28
COM26
COM24
COM22
COM20
COM18
COM16
COM14
COM12
COM10
COM8
COM6
COM4
COM2
COM0
ICONS
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
V16
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
X-pos
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5629.7
5642.2
5582.2
5522.2
5462.2
5402.2
5342.2
5282.2
5222.2
5162.2
5102.2
5042.2
4982.2
4922.2
4862.2
4802.2
4742.2
4682.2
4622.2
4562.2
4502.2
4442.2
4382.2
4322.2
4262.2
4202.2
4142.2
3990
3930
3870
3810
3750
3690
3630
3570
3510
3450
3390
3330
3270
3210
3150
3090
3030
2970
2910
2850
2790
2730
2670
2610
2550
2490
2430
2370
2310
2250
2190
2130
2070
2010
1950
1890
1830
1770
1710
1650
1590
1530
1470
1410
1350
1290
1230
1170
1110
Y-pos
-445
-385
-325
-265
-205
-145
-85
-25
35
95
155
215
275
335
395
455
515
575
635
695
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
Pad No.
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
PT6866 Pad Name
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
V16
SEG86
SEG87
SEG88
SEG89
SEG90
SEG91
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG101
SEG102
SEG103
SEG104
SEG105
SEG106
SEG107
SEG108
SEG109
SEG110
SEG111
SEG112
SEG113
SEG114
SEG115
SEG116
SEG117
SEG118
SEG119
SEG120
SEG121
SEG122
SEG123
SEG124
SEG125
SEG126
SEG127
SEG128
SEG129
SEG130
SEG131
COM1
COM3
COM5
COM7
COM9
COM11
COM13
COM15
COM17
COM19
- 27 -
X-pos
1050
990
930
870
810
750
690
630
570
510
450
390
330
270
210
150
90
30
-30
-90
-150
-210
-270
-330
-390
-450
-510
-570
-630
-690
-750
-810
-870
-930
-990
-1050
-1110
-1170
-1230
-1290
-1350
-1410
-1470
-1530
-1590
-1650
-1710
-1770
-1830
-1890
-1950
-2010
-2070
-2130
-2190
-2250
-2310
-2370
-2430
-2490
-2550
-2610
-2670
-2730
-2790
-2850
-2910
-2970
-3030
-3090
-3150
-3210
-3270
-3330
-3390
-3450
-3510
-3570
-3630
-3690
-3750
-3810
-3870
-3930
-3990
-4142.2
-4202.2
-4262.2
-4322.2
-4382.2
-4442.2
-4502.2
-4562.2
-4622.2
-4682.2
Y-pos
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
Pad No.
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
PT6866 Pad Name
COM21
COM23
COM25
COM27
COM29
COM31
COM33
COM35
COM37
COM39
COM41
COM43
COM45
VSS
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
COM47
COM49
COM51
COM53
COM55
COM57
COM59
COM61
COM63
ICONS
DUMMY
DUMMY
DUMMY
DUMMY
DUMMY
X-pos
-4742.2
-4802.2
-4862.2
-4922.2
-4982.2
-5042.2
-5102.2
-5162.2
-5222.2
-5282.2
-5342.2
-5402.2
-5462.2
-5522.2
-5582.2
-5642.2
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.7
-5629.1
-5542.9
Y-pos
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
912.5
695
635
575
515
455
395
335
275
215
155
95
35
-25
-85
-145
-205
-265
-325
-385
-445
-505
-565
-625
-685
-833.2
-833.2
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
TCP PIN ASSIGNMENT (1)
PT6866 V1.0
NC
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
VSS
CCL
D7
D6
D5
D4
D3
D2
D1
D0
VDD
E(RD#)
R/W#(WR#)
RS
RES#
CS1#
CL
VDD
VSS
SEGG
V16
NC
PT6866 Chip
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
- 28 -
NC
COM62
COM60
COM58
195
194
193
192
COM4
COM2
COM0
NC
SEG16
SEG17
SEG18
165
164
163
162
161
160
159
SEG109
SEG110
SEG111
NC
COM1
COM3
COM5
68
67
66
65
64
63
62
COM59
COM61
COM63
NC
35
34
33
32
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
TCP PIN ASSIGNMENT (2)
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
PT6866 V1.0
PIN NAME
NC
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
VSS
CCL
D7
D6
D5
D4
D3
D2
D1
D0
VDD
E(RD#)
R/W#(WR#)
RS
RES#
CS1#
CL
VDD
VSS
SEGG
V16
NC
NC
COM63
COM61
COM59
COM57
COM55
COM53
COM51
COM49
COM47
COM45
COM43
COM41
COM39
COM37
COM35
COM33
COM31
COM29
COM27
COM25
COM23
COM21
COM19
COM17
COM15
COM13
COM11
COM9
PIN NO
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
PIN NAME
COM7
COM5
COM3
COM1
NC
SEG111
SEG110
SEG109
SEG108
SEG107
SEG106
SEG105
SEG104
SEG103
SEG102
SEG101
SEG100
SEG99
SEG98
SEG97
SEG96
SEG95
SEG94
SEG93
SEG92
SEG91
SEG90
SEG89
SEG88
SEG87
SEG86
SEG85
SEG84
SEG83
SEG82
SEG81
SEG80
SEG79
SEG78
SEG77
SEG76
SEG75
SEG74
SEG73
SEG72
SEG71
SEG70
SEG69
SEG68
SEG67
SEG66
SEG65
SEG64
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
PIN NO
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
- 29 -
PIN NAME
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
NC
COM0
COM2
COM4
COM6
COM8
COM10
COM12
COM14
COM16
COM18
COM20
COM22
COM24
COM26
COM28
COM30
COM32
COM34
PIN NO
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
PIN NAME
COM36
COM38
COM40
COM42
COM44
COM46
COM48
COM50
COM52
COM54
COM56
COM58
COM60
COM62
NC
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
TCP PACKAGE DIMENSIONS
PT6866 V1.0
- 30 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
COF PIN ASSIGNMENT (1)
1
NC
V 16
S EG G
B VR
V SS
V DD
NC
NC
COM62
COM60
COM58
COM56
249
248
247
246
245
244
COM6
COM4
COM2
COM0
NC
219
218
217
216
215
I/S #
P /S#
CM P U
P T6866 C hip
V SS
CC L
D7
D6
D5
D4
D3
D2
D1
D0
V DD
E (R D#)
R/W #( W R# )
NC 205
SE G0 204
SE G1 203
SE G126 78
SE G127 77
NC 76
RS
RE S #
CS I#
CL
V DD
V SS
S EG G
V 16
31
NC
PT6866 V1.0
- 31 -
NC
COM1
COM3
COM5
COM7
66
65
64
63
62
COM57
COM59
COM61
COM63
NC
NC
37
36
35
34
33
32
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
COF PIN ASSIGNMENT (2)
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
PT6866 V1.0
PIN NAME
NC
V16
SEGG
BVR
VSS
VDD
I/S#
P/S#
CMPU
VSS
CCL
D7
D6
D5
D4
D3
D2
D1
D0
VDD
E(RD#)
R/W#(WR#)
RS
RES#
CS1#
CL
VDD
VSS
SEGG
V16
NC
NC
NC
COM63
COM61
COM59
COM57
COM55
COM53
COM51
COM49
COM47
COM45
COM43
COM41
COM39
COM37
COM35
COM33
COM31
COM29
COM27
COM25
COM23
COM21
COM19
COM17
COM15
COM13
COM11
PIN NO
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
PIN NAME
COM9
COM7
COM5
COM3
COM1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SEG127
SEG126
SEG125
SEG124
SEG123
SEG122
SEG121
SEG120
SEG119
SEG118
SEG117
SEG116
SEG115
SEG114
SEG113
SEG112
SEG111
SEG110
SEG109
SEG108
SEG107
SEG106
SEG105
SEG104
SEG103
SEG102
SEG101
SEG100
SEG99
SEG98
SEG97
SEG96
SEG95
SEG94
SEG93
SEG92
SEG91
SEG90
SEG89
SEG88
SEG87
SEG86
SEG85
SEG84
PIN NO
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
- 32 -
PIN NAME
SEG83
SEG82
SEG81
SEG80
SEG79
SEG78
SEG77
SEG76
SEG75
SEG74
SEG73
SEG72
SEG71
SEG70
SEG69
SEG68
SEG67
SEG66
SEG65
SEG64
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
PIN NO
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
PIN NAME
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
COM0
COM2
COM4
COM6
COM8
COM10
COM12
COM14
COM16
COM18
COM20
COM22
COM24
COM26
COM28
COM30
COM32
COM34
COM36
COM38
COM40
COM42
COM44
COM46
COM48
PIN NO
241
242
243
244
245
246
247
248
249
PIN NAME
COM50
COM52
COM54
COM56
COM58
COM60
COM62
NC
NC
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
COF PACKAGE DIMENSIONS
PT6866 V1.0
- 33 -
December, 2004
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
OLED Driver IC
PT6866
ORDER INFORMATION
Order Part Number
PT6866
PT6866-F
PT6866-H
PT6866 V1.0
Package Type
TCP
COF
Gold Bump Chip
- 34 -
Remark
PTC also offer 96 x 64 or 128 x 64
PTC also offer 128 x 64
-
December, 2004